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Field Effect Transistor (MOSFET) Detection Method and Experience
First and foremost, the use of a pointer multimeter is essential for identifying a Field Effect Transistor (FET). To determine the electrodes of a Junction Field Effect Transistor using the resistance method, it's crucial to recognize the differing resistance values of the PN junction. Here’s how you can go about it: Set your multimeter to the R×1k setting and measure the positive and negative resistance values of two electrodes. If the positive and negative readings are equal and several thousand ohms, these electrodes are the drain (D) and source (S), respectively. Since the source and drain are interchangeable for a Junction Field Effect Transistor, the remaining electrode must be the gate (G). Alternatively, you can touch the black probe of the multimeter to one electrode and measure the resistance between it and the other two electrodes. When the two measured resistance values are roughly equal, the electrode touched by the black probe is the gate, while the remaining two are the drain and source. If the resistance values are large, it indicates the reverse of the PN junction, meaning it’s an N-channel FET, and the black probe is connected to the gate. If the resistance values are small, it’s a forward PN junction, indicating a P-channel FET, and the black probe is also connected to the gate. If none of these scenarios occur, simply swap the probes as described until the gate is identified.
Next, the quality of a FET can be determined using the resistance method. By measuring the resistance between the source and drain, gate and source, gate and drain, and between two gates, you can assess whether the FET is functioning properly. Start by placing the multimeter on the R×10 or R×100 setting and measure the resistance between the source (S) and drain (D). This resistance typically ranges from tens of ohms to several thousand ohms (varies per model). If the measured resistance exceeds the expected value, there might be poor internal contact; if it reads infinite, there could be an internal fault. Switch the multimeter to the R×10k setting and measure the resistance between the gates, gate and source, and gate and drain. Infinite resistance indicates a normal FET; if the resistance is too small or shows a conductive path, the FET is defective. Note that if both gates are broken, the component substitution method can be used for further testing.
The amplification capability of a FET can also be estimated using the inductive signal input method. Specifically, set the multimeter to the R×100 setting, connect the red probe to the source (S), and the black probe to the drain (D). Add a 1.5V power supply across the FET. At this point, the needle indicates the resistance between the drain and source. Next, pinch the gate (G) with your hand to apply an induced voltage signal. Due to the tube's amplification, both the drain-source voltage (VDS) and drain current (Id) will change, causing the resistance between the drain and source to vary, resulting in a significant needle swing. A smaller swing indicates poor amplification ability; a larger swing suggests strong amplification capability; no movement signifies a faulty tube.
When applying this method to a 3DJ2F Junction Field Effect Transistor, opening the G pole and measuring the drain-source resistance (RDS) at 600Ω was recorded. After pinching the G pole, the needle swung significantly to the left, indicating an RDS of 12kΩ. This large swing confirmed the tube’s good condition and high amplification capability.
There are some important considerations when using this method. First, when the gate is pinched, the needle may swing either way—left or right—due to the varying AC voltage induced by the human body and the operating points of different FETs. Most often, the RDS increases, causing the needle to swing left; however, a few tubes may see a decrease, swinging the needle right. Regardless of the direction, a large swing indicates good amplification. Second, this method applies to MOS FETs as well, though care must be taken as the high input resistance of MOS FETs limits the induced voltage. Avoid direct hand contact; instead, use a screwdriver with an insulated handle to touch the gate. Lastly, always short-circuit the GS after each measurement to release any residual charge.
To identify an unmarked FET using the resistance method, start by finding two electrodes with a measurable resistance value, identifying them as the source (S) and drain (D). The remaining two legs are the first gate (G1) and second gate (G2). Record the resistance values between S and D, then measure again to confirm. The black probe-connected electrode is the drain (D); the red probe-connected is the source (S). This identification can also be verified using the amplification estimation method, ensuring consistency in results.
Transconductance can be gauged by observing changes in the reverse resistance value. Using a VMOS N-channel enhancement type FET, connect the red probe to the source (S) and the black probe to the drain (D) on the R×10k setting. This creates a reverse voltage between the source and drain. With the gate open, the reverse resistance is highly unstable. Touching the gate with your hand significantly alters the resistance value, with larger changes indicating higher transconductance.
When utilizing FETs, ensure that the dissipated power, maximum drain-source voltage, maximum gate-source voltage, and maximum current limits are not exceeded. Always adhere to the required bias in the circuit, respecting the polarity of the FET bias. MOS FETs, with their extremely high input impedance, require careful handling during transport and storage, including metal shielding to prevent external potentials from affecting the gate. Additionally, maintain moisture resistance.
For safety, all test instruments, worktables, soldering irons, and circuits must be grounded. Solder the source first, keep all lead ends short-circuited before soldering, and remove the short-circuit material afterward. When removing the FET, ensure proper grounding of the human body. Use advanced gas-fired soldering irons for safer soldering. Never insert or remove FETs while powered on.
In terms of installation, consider the location to avoid heating elements. Secure the casing to prevent vibration, and bend pins with a 5mm margin from the root to prevent air leaks. Power FETs require good heat dissipation conditions, necessitating a robust heat sink to ensure stable operation.
VMOS FETs, or V-channel MOS field effect transistors, are highly efficient power switching devices. They combine the benefits of MOSFETs with those of power transistors, offering high input impedance, low drive current, high withstand voltage, and more. They're widely used in voltage and power amplifiers, switching power supplies, and inverters.
The VMOS tube's unique structure includes a V-groove metal gate and vertical conductivity. This design allows for a large current flow due to increased cross-sectional area. Its high input impedance and large linear amplification area make it ideal for parallel connections.
Domestic manufacturers like 877 Factory and Hangzhou Electronic Tube Factory produce notable VMOS FETs such as VN401 and VN672. Testing involves identifying the gate, determining source and drain based on PN junction differences, measuring on-state resistance, and checking transconductance. Precautions include handling P-channel tubes differently and being mindful of protection diodes in some models.
Overall, safe and effective FET usage requires understanding and implementing various safety measures, tailored to individual circumstances.